
Transcription
Xilinx ISE WebPACK Schematic Capture TutorialRevision: February 27, 2010215 E Main Suite D Pullman, WA 99163(509) 334 6306 Voice and FaxOverviewThis tutorial provides instruction for using the Xilinx ISE WebPACK toolset for basicdevelopment on Digilent system boards. This tutorial covers the following steps: Creating a Xilinx ISE projectUsing schematic capture to create logic circuits and symbol elementsCreating a User Constraints File (UCF)Synthesizing, implementing, and generating a Programming fileMore detailed tutorials for the Xilinx ISE tools can be found .Getting StartedFirst, install Xilinx ISE WebPACK on your PC or laptop. This tutorial is based on version 11.1.It is available as a free download from www.xilinx.com.This tutorial uses settings for the Nexys2 500k board, which can be purchased fromwww.digilentinc.com. The settings for other Digilent system boards can be found there as well.Starting a New ProjectTo create a new project, open Project Navigator either from the Desktop shortcut icon or byselecting Start Programs Xilinx ISE Design Suite 11 ISE Project Navigator. In ProjectNavigator, select the New Project option from the Getting Started menu (or by selecting SelectFile New Project).This brings up a Dialog box where you can enter the desired project name and project location.You should choose a meaningful name for easy reference. In this tutorial, we call this project“example1” and save it in a local directory. You can place comments for your project in theDescription text box. We use Schematic for our top-level source type in this tutorial.Doc: 594-000page 1 of 15Copyright Digilent, Inc. All rights reserved.Other product and company names mentioned may be trademarks of their respective owners.
Xilinx ISE WebPACK Schematic Capture TutorialDigilent, t Digilent, Inc. All rights reserved.Other product and company names mentioned may be trademarks of their respective owners.page 2 of 15
Xilinx ISE WebPACK Schematic Capture TutorialDigilent, Inc.www.digilentinc.comThe next step is to select the proper Family, Device, and Package for your project. Thisdepends on the chip you are targeting for the project. The appropriate settings for a projectsuited for the Nexys2 500k board are as follows:Once the appropriate settings have been entered, click Next.The next two dialog boxes give you the option of adding new or existing source files to yourproject. Since we will fulfill these steps later, click Next without adding any source files.www.digilentinc.comCopyright Digilent, Inc. All rights reserved.Other product and company names mentioned may be trademarks of their respective owners.page 3 of 15
Xilinx ISE WebPACK Schematic Capture TutorialDigilent, Inc.www.digilentinc.comBefore the new project is created, the New Project Wizard gives you a project summaryconsisting of the selected specifications you have chosen for the project. Make sure all settingsare correct before clicking Finish to end the New Project Wizard. Any modifications to thesesettings can be made by clicking the Back button.www.digilentinc.comCopyright Digilent, Inc. All rights reserved.Other product and company names mentioned may be trademarks of their respective owners.page 4 of 15
Xilinx ISE WebPACK Schematic Capture TutorialDigilent, Inc.www.digilentinc.comProject Navigator OverviewOnce the new project has been created, ISE opens the project in Project Navigator. Click theDesign tab to show the Design panel and click the Console tab to show the Consol panel.The Design panel (1) contains two windows: a Sources window that displays all source filesassociated with the current design and a Process window that displays all available processesthat can be run on a selected source file.The Console panel (2) displays status messages including error and warning messages.The HDL editor window (3) displays source code or the schematic from files selected in theDesign panel.www.digilentinc.comCopyright Digilent, Inc. All rights reserved.Other product and company names mentioned may be trademarks of their respective owners.page 5 of 15
Xilinx ISE WebPACK Schematic Capture TutorialDigilent, Inc.www.digilentinc.comAdding New Source FilesOnce the new project is created, two sources are listed under sources in the Design panel: theProject file name and the Device targeted for design.You can add a new or existing source file to the project. To do this, right-click the target deviceand select one of the three options for adding source files.www.digilentinc.comCopyright Digilent, Inc. All rights reserved.Other product and company names mentioned may be trademarks of their respective owners.page 6 of 15
Xilinx ISE WebPACK Schematic Capture TutorialDigilent, Inc.www.digilentinc.comIn this tutorial, we create a new source file, so select New Source from the list. This starts theNew Source Wizard, which prompts you for the Source type and file name. Select Schematicand give it a meaningful name (we name it circuit1).www.digilentinc.comCopyright Digilent, Inc. All rights reserved.Other product and company names mentioned may be trademarks of their respective owners.page 7 of 15
Xilinx ISE WebPACK Schematic Capture TutorialDigilent, Inc.www.digilentinc.comSchematic Editor WindowOnce you have created the new schematic file you can see it in the Sources panel. Doubleclick it to open the file in the schematic capture window as follows:You can add symbols and shapes representing logic gates or logic circuits and then add linesrepresenting wires to connect those shapes.On the screen, there are two list boxes labeled Symbols and Categories.The Symbols list shows all of the symbols in selected category in the Categories list. Forexample, the “ --All symbols-- ” category displays all symbols in the current library in theSymbols list.In this tutorial, we use a simple combinational logic example, and then show how it can be usedas a macro symbol in another schematic module. We start with the basic logic equation: Y (A·B) C.To add a simple logic gate to the circuit, left-click to select a symbol from the Symbols list, dragthe cursor to the pallet where you want the symbol to be placed, and left-click again to drop thegate in the schematic. You can also find a symbol by typing a name into the symbol name filter.www.digilentinc.comCopyright Digilent, Inc. All rights reserved.Other product and company names mentioned may be trademarks of their respective owners.page 8 of 15
Digilent, Inc. Xilinx ISE WebPACK Schematic Capture Tutorialwww.digilentinc.comThe following figure contains descriptions for the tools necessary for creating a basic digitalcircuit using schematic capture:1. The Magnifying Glass icon indiscriminately zooms to the center of the schematic.2. The Zoom box icon is used to draw a box using the mouse to magnify a specific area ofthe schematic.3. The Wire-Add tool icon places cursor in wire-add mode.4. The Add I/O marker tool icon places cursor into add I/O marker mode.Now we connect the gates with wires. To do this, left-click on the wire-add tool button tochange to wire-add mode. Drag the cursor to a component pin where four red boxes appear(they indicate that a left-click will add one end of the wire to the pin). Using this method you canadd wires between pins of gates.To move a gate, you must go back to select mode by either selecting the cursor in the tool baror pressing the Esc button on the keyboard.www.digilentinc.comCopyright Digilent, Inc. All rights reserved.Other product and company names mentioned may be trademarks of their respective owners.page 9 of 15
Xilinx ISE WebPACK Schematic Capture TutorialDigilent, Inc.www.digilentinc.comTo terminate one end of a wire without connecting it to a gate, double-click where you want thewire to end in space. This is used for general circuit inputs and outputs.Adding top-level I/O markers to your circuit tells the synthesizer and simulator tools which portsto regard as overall inputs and outputs. To add these to your circuit, left-click on the Add I/Omarker tool icon to place the cursor into add I/O marker mode. Left-click on the end of a wire toadd an I/O marker and then repeat until a marker is placed on all inputs and outputs.Go back to regular cursor mode and double left-click on an I/O marker. When the I/O marker’sobject properties dialog box appears, select the Nets category and enter a meaningful value forthe Name field of the I/O marker. The finished dialog box should look similar to the following:Repeat this process for all I/O. The finished circuit should look similar to the following:Now we create a macro symbol for future use of this completed circuit. To create a macrocircuit, select Tools Symbol Wizard from the main menu toolbar. The Symbol Wizard dialogbox appears. Under “Pin name source”, select “Using schematic” which defaults to the circuityou just created, circuit1.www.digilentinc.comCopyright Digilent, Inc. All rights reserved.Other product and company names mentioned may be trademarks of their respective owners.page 10 of 15
Xilinx ISE WebPACK Schematic Capture TutorialDigilent, Inc.www.digilentinc.comThe next two dialog boxes present general pin placement and symbol size options that you canmodify depending on how you want the schematic symbol to appear. The final dialog box givesyou a preview of the symbol, given the settings you’ve selected. Click Finish to finalize thesymbol or Back to modify the symbol settings.Save changes to the current schematic editor session before closing the schematic file andreturn to the Project Navigator main window. Right-click on the device to add a new schematicsource file; we call ours circuit2. In the new schematic editor session you can now find thenewly created symbol for circuit1 in the symbols window and add it to your overall design.www.digilentinc.comCopyright Digilent, Inc. All rights reserved.Other product and company names mentioned may be trademarks of their respective owners.page 11 of 15
Xilinx ISE WebPACK Schematic Capture TutorialDigilent, Inc.www.digilentinc.comThe following figure shows our completed example of using a macro symbol to build the overallcircuit Y (A · B) (C · D):Using this method, you can create complex circuits by adding any components from the Xilinxlibrary or by building your own components and adding them to an even larger design.UCF File CreationThe Xilinx tools use a User Constraints File (.ucf file) to define user constraints like physical pinto circuit net mappings. This is sometimes referred to as an Implementation Constraints File.The .ucf file can be modified inside ISE using a text editor.To add a .ucf file to your design, go to the Sources window and right-click the source file thatrequires user constraints. Select the Add New Source option in the drop-down menu. The NewSource Wizard prompts you for the Source type and file name. Select ImplementationConstraints File and give it a meaningful name (we name it circuit2).To edit the .ucf file, select it in the Sources window, expand the User Constraints option in theProcesses window below, and double-click the Edit Constraints (Text) option. A blank texteditor appears.www.digilentinc.comCopyright Digilent, Inc. All rights reserved.Other product and company names mentioned may be trademarks of their respective owners.page 12 of 15
Xilinx ISE WebPACK Schematic Capture TutorialDigilent, Inc.www.digilentinc.comTo associate a physical pin with a given net name, type: NET “netname” LOC ”XXX”; on a linein the .ucf file. In the statement, “netname” (quotes included) is the name of the net to attach topin number XXX (quotes included).For our example project, the four inputs are assigned to switches 0 through 3 and the output isassigned to LED0 on the Nexys2 board. The finished .ucf file is as follows:www.digilentinc.comCopyright Digilent, Inc. All rights reserved.Other product and company names mentioned may be trademarks of their respective owners.page 13 of 15
Xilinx ISE WebPACK Schematic Capture TutorialDigilent, Inc.www.digilentinc.comProgramming File GenerationNow we are ready to create a programming file (.bit) for the Nexys2 FPGA.Go to the Sources window and select the top-level module (indicated by the three blocks shownwith the source name.)Now go to the Processes window where there are three particular processes in a row:1. Synthesize – XST2. Implement Design3. Generate Programming fileRun the synthesis process by either double-clicking on Synthesize or left-clicking and selectingthe run option. This process analyzes the circuit you have created, checking for validconnections, syntax, and structure, to verify that the circuit is valid and synthesizable.If the Synthesize process does not return any errors, you can move on and run the ImplementDesign process. This process uses various algorithms to map out the digital circuit and thencreates place and route information so that it can be placed on the physical FPGA.www.digilentinc.comCopyright Digilent, Inc. All rights reserved.Other product and company names mentioned may be trademarks of their respective owners.page 14 of 15
Xilinx ISE WebPACK Schematic Capture TutorialDigilent, Inc.www.digilentinc.comStartup Clock OptionsIf the Implement Design process does not return any errors, you can run the GenerateProgramming File process. Before we do this, right-click on the Generate Programming Fileprocess and select Process Properties. In the category pane of the Process Properties window,select Startup Options.The first item in the right panel is the FPGA Start-Up Clock property. This option allows aconfiguration file to either configure a board straight from the PC, or load a configuration fromplatform flash memory on the board. To configure the board from the PC, the start-up clockvalue should be JTAG Clock. To configure the board from platform flash, the start-up clockvalue should be CCLK.After selecting the appropriate start-up clock value, click OK and run the Generate ProgrammingFile process. After this process completes, a configuration .bit file should appear in the directorywhere your project is located.Board ConfigurationThe configuration .bit file that has been generated can now be used by Digilent’s Adept softwareto configure a Digilent system board. See the Adept Software Basic Tutorial for moreinformation.www.digilentinc.comCopyright Digilent, Inc. All rights reserved.Other product and company names mentioned may be trademarks of their respective owners.page 15 of 15
The .ucf file can be modified inside ISE using a text editor. To add a .ucf file to your design, go to the Sources window and right-click the source file that requires user constraints. Select the Add New Source option in the drop-down menu. The New Source Wizard prompts you for the Source t